Crate apic

Structs

ApicId
A unique identifier for a Local APIC, i.e., a CPU on x86_64.
ApicRegisters
A structure that offers access to APIC/xAPIC through its I/O registers.
LocalApic
This structure represents a single Local APIC in the system; there is one per CPU.
RegisterArray

InterruptChip
LapicDeliveryMode
The delivery mode used when an interrupt is sent to a CPU core.
LapicInitError
The possible errors that can occur in LocalApic::init().
LapicIpiDestination
The possible destination shorthand values for IPI ICR.
LapicTimerDivide
The possible values for the Local APIC Timer Divide Configuration Register.
LvtLint
The Local APIC’s vector table local interrupt pins.

APIC_SPURIOUS_INTERRUPT_IRQ
The IRQ number reserved for spurious APIC interrupts (as recommended by OS dev wiki).
LOCAL_APIC_LVT_IRQ
The IRQ number reserved for Local APIC timer interrupts in the IDT.

INTERRUPT_CHIP
The interrupt chip that is currently configured on this machine. The default is InterruptChip::PIC, but the typical case is APIC or X2APIC, which will be set once those chips have been initialized.

bootstrap_cpu
Returns the APIC ID of the bootstrap CPU (if known), which is the first CPU to run after system power-on.
cpu_count
Returns the number of CPUs (SMP cores) that exist and are currently initialized on this system.
current_cpu
Returns the ID of the currently executing CPU.
get_lapics
Returns a reference to the list of LocalApics, one per CPU core.
get_my_apic
Returns a reference to the LocalApic for the currently executing CPU core.
has_x2apic
Returns true if the machine has support for x2apic
init
Determines whether this system contains an xapic or x2apic and enables the Local APIC hardware in the correct mode.
is_bootstrap_cpu
Returns true if the currently executing CPU is the bootstrap CPU, i.e., the first procesor to run after system power-on.