Enum apic::LapicDeliveryMode

#[repr(u32)]
pub enum LapicDeliveryMode {
    Fixed = 0,
    Smi = 2,
    Nmi = 4,
    Init = 5,
    ExtInt = 7,
}

The delivery mode used when an interrupt is sent to a CPU core.

This value can be used in the following APIC registers:

• timer
• CMCI (corrected machine check error)
• lint0
• lint1
• performance monitoring counters
• thermal sensor

Variants

Fixed = 0

Delivers the interrupt (as normal) to the IRQ specified in the vector field.

Smi = 2

Delivers an SMI interrupt to the CPU; the vector field should be 0x00.

Nmi = 4

Delivers an NMI interrupt to the CPU; the vector field is ignored.

Init = 5

Delivers an INIT request to the CPU; the vector field should be 0x00.

ExtInt = 7

Causes the CPU to respond to the interrupts as if it originated from an external interrupt controller (e.g., the PIC).

Trait Implementations

impl Clone for LapicDeliveryMode

fn clone(&self) -> LapicDeliveryMode

Returns a copy of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Debug for LapicDeliveryMode

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.

impl Copy for LapicDeliveryMode