Struct apic::ApicRegisters

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#[repr(C)]
pub struct ApicRegisters {
Show 26 fields pub lapic_id: ReadOnly<u32>, pub lapic_version: ReadOnly<u32>, pub task_priority: Volatile<u32>, pub arbitration_priority: ReadOnly<u32>, pub processor_priority: ReadOnly<u32>, pub eoi: WriteOnly<u32>, pub remote_read: ReadOnly<u32>, pub logical_destination: Volatile<u32>, pub destination_format: Volatile<u32>, pub spurious_interrupt_vector: Volatile<u32>, pub in_service_registers: RegisterArray, pub trigger_mode_registers: RegisterArray, pub interrupt_request_registers: RegisterArray, pub error_status: ReadOnly<u32>, pub lvt_cmci: Volatile<u32>, pub interrupt_command_low: Volatile<u32>, pub interrupt_command_high: Volatile<u32>, pub lvt_timer: Volatile<u32>, pub lvt_thermal: Volatile<u32>, pub lvt_perf_monitor: Volatile<u32>, pub lvt_lint0: Volatile<u32>, pub lvt_lint1: Volatile<u32>, pub lvt_error: Volatile<u32>, pub timer_initial_count: Volatile<u32>, pub timer_current_count: ReadOnly<u32>, pub timer_divide: Volatile<u32>, /* private fields */
}
Expand description

A structure that offers access to APIC/xAPIC through its I/O registers.

Definitions are based on Intel’s x86 Manual Vol 3a, Table 10-1. Link to the manual.

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§lapic_id: ReadOnly<u32>

This Local APIC’s ID.

Some processors (e.g., Intel ones prior to Nehalem) allow writing to the ID register, but we define it as read-only for wider compatibility and because we have no reason to write to it. See section 10.4.6 of Intel SDM. Only the top 8 bits are relevant, so bit shift it to the right by 24 bits to get the actual ID.

§lapic_version: ReadOnly<u32>§task_priority: Volatile<u32>§arbitration_priority: ReadOnly<u32>§processor_priority: ReadOnly<u32>§eoi: WriteOnly<u32>§remote_read: ReadOnly<u32>§logical_destination: Volatile<u32>§destination_format: Volatile<u32>§spurious_interrupt_vector: Volatile<u32>§in_service_registers: RegisterArray§trigger_mode_registers: RegisterArray§interrupt_request_registers: RegisterArray§error_status: ReadOnly<u32>§lvt_cmci: Volatile<u32>§interrupt_command_low: Volatile<u32>§interrupt_command_high: Volatile<u32>§lvt_timer: Volatile<u32>§lvt_thermal: Volatile<u32>§lvt_perf_monitor: Volatile<u32>§lvt_lint0: Volatile<u32>§lvt_lint1: Volatile<u32>§lvt_error: Volatile<u32>§timer_initial_count: Volatile<u32>§timer_current_count: ReadOnly<u32>§timer_divide: Volatile<u32>

Trait Implementations§

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impl FromBytes for ApicRegisters

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