Static page_attribute_table::FIXED_PAT

pub static FIXED_PAT: PageAttributeTable

Theseus’s fixed PageAttributeTable has slots that align with the default meaning of page table entry bits on x86_64.

Bit Position	If Clear (0)	If Set (1)
0 (LSB)	write back	write through
1 (middle)	cache enabled	cache disabled
2 (MSB)	N/A	N/A

Thus, the following slots are chosen to align with those bits:

• Slot 0 (0b000): MemoryCachingType::WriteBack
• Slot 1 (0b001): MemoryCachingType::WriteThrough
• Slot 2 (0b010): MemoryCachingType::Uncacheable (caching disabled)
• Slot 3 (0b011): unused – write through and cache enabled doesn’t make sense, but this is set up as Uncacheable because the cache disabled flag takes priority.

The following slots are available for custom use, and Theseus currently sets them up as such:

• Slot 4 (0b100): MemoryCachingType::WriteProtected
• Slot 5 (0b101): MemoryCachingType::WriteCombining
• Slot 6 (0b110): MemoryCachingType::UncachedMinus
• Slot 7 (0b111): MemoryCachingType::UncachedMinus

Currently, the difference between Uncacheable and UncachedMinus is not clear, so we offer slots for both.

Usage

You cannot and do not need to use this type directly, as it is pre-set up statically for you. Instead, use MemoryCachingType::pat_slot_index() to obtain the index of the PAT slot that has been set up for whatever MemoryCachingType you need.